1. Field of the Invention
The present invention generally related to a method of evaluating configuration of solder external terminals of semiconductor device, and particularly relates to evaluation of failures of configuration of solder external terminals of a BGA (Ball Grid Array) semiconductor device after secondary mounting process.
2. Description of the Related Art
Recently, a semiconductor device is required to have a package structure that can achieve higher density, higher speed and higher power at a low cost. An FBGA (Fine pitch Ball Grid Array) type semiconductor device having a fine-patched structure has been developed to meet such requirements. The FBGA type semiconductor device are now used in various types of electronic equipment. There are some FBGA type semiconductor devices provided with tape substrates to achieve a further fine-pitched structure. Such fine-pitched semiconductor devices must also be mounted on mounting boards with high reliability.
One method of evaluating the reliability is to estimate the configuration of ball-shaped solder external terminals. In the estimation, the configuration of the solder external terminal is estimated for a state after the semiconductor device has been mounted on the mounting board. When the solder external terminals are arranged in a fine pitched structure, it becomes difficult to estimate the configuration of the solder external terminals. Accordingly, there is a need for a simple and accurate method of evaluating the configuration of the solder external terminals.
FIG. 1 is a schematic diagram showing a semiconductor device 1 having a package structure of a FBGA type. The semiconductor device 1 generally comprises a tape 2, a semiconductor chip 4, ball-shape solder external terminals 6 and a sealing resin 8.
The tape 2 is made of a material such as polyimide resin. Electrode patterns 10 and bonding pads 12 are provided on a first (upper) surface 2a of the tape 2. Also, the semiconductor chip 4 is mounted on the first surface 2a of the tape 2. In order to provide the electrode patterns 10 and the bonding pads 12, a copper layer is formed on tape 2 and then an etching process is implemented on the copper layer to form predetermined patterns. The electrode patterns 10 and the bonding pads 12 are electrically connected by wiring patterns(not shown).
Also, wires 14 are provided between the semiconductor chop 4 and the bonding pads 12. Accordingly, the semiconductor chip 4 and the electrode patterns 10 are electrically connected via the wires 14, the bonding pads 12 and the wiring patterns. Further tape opening 16 are formed through the tape 2 at positions corresponding to the electrode patterns 10 of the tape 2.
The ball-shaped solder external terminals 6 are provided such that a solder ball parts are on a second (lower) surface 2b of the tape 2. The ball-shaped solder external terminals 6 are provided at positions corresponding to tape openings 16. The ball-shaped solder external terminals 6 are joined to the electrode patterns 10 via the tape openings 16. That is to say, the ball-shaped solder external terminals 6 are joined to the electrode patterns 10 and thus the ball-shaped solder external terminals 6 are attached to the tape 2.
The ball-shaped solder external terminals 6 are joined the electrode patterns 10 in the following manner. First, the tape 2 provided with the electrode patterns 10 and the tape openings 16 is reversed. Then, solder paste 13 is filled in the tape openings 16 (see FIG. 5). Solder balls 6A are placed on the solder paste 13 provided in the tape opening 16. A heat treatment is carried out to fuse the solder balls 6A and the solder paste 13. Then, the fused solder is subjected to a cooling treatment, so that the solder is cured and thus the solder balls 6A are attached to the electrode patterns 10. It is to be noted that the openings 16 are filled with solder.
Thus, with the processes described above, the solder balls 6A are joined to the electrode patterns 10 to for ball-shaped solder external terminal 6. Also, the ball-shaped solder external terminal 6 is shaped such that a portion protruding from the tape opening 16 becomes spherical due to surface tension during the fusing step.
FIGS. 2A to 2C show various steps of mounting the semiconductor device 1 of the above structure onto the mounting board 3. As shown in FIG. 2A, solder paste 19 is provided on lands 17 formed in the mounting board 3, for example, by printing. After registering the ball-shaped solder external terminals 6 and the lands 17, the semiconductor device 1 is placed on the mounting board 3. The solder paste 19 is a mixture of solder particles and a viscous organic agent. The organic agent serves as an adhesive agent to temporarily fix the semiconductor device 1 on the mounting board 3.
Subsequently, the mounting board 3 and the semiconductor device 1 temporarily fixed thereon are subjected to a heat treatment in a reflow oven. Accordingly, the solder particles included in the solder balls 6 and the solder paste 19 are fused, and the organic agent in the solder paste 19 is vaporized. Thus, the ball-shaped solder external terminals 6 and the lands 17 are soldered and the semiconductor device 1 is mounted on the mounting board 3.
In the process of mounting the semiconductor device 1 onto the mounting board 3, there may be a case in which the ball-shaped solder external terminals 6 are not properly joined to the lands 17. This will be described with reference to FIGS. 2A to 2C.
The process of mounting the semiconductor device 1 on to the mounting board 3 has been described above with reference to FIG. 2A. In the process described above, the solder paste 19 is provided on the lands 17. Then, the solder balls 6 and the lands 17 are temporarily fixed by means of the solder paste 19. Thereafter, a reflow process is carried out, so that the solder particles in the solder balls 6 and the solder paste 19 for mounting are fused.
The above described process may be unsuccessful if un appropriate selections are made for the size of the tape openings 16 formed in the tape 2, total amount of the solder, and the size of the lands 17. As shown in FIG. 2B, there may be a case in which most of the solder may flow towards the lands 17 and the ball-shaped solder external terminal 6 is necked within the tape opening 16 (hereinafter referred to as a necking failure). Further, as shown in FIG. 2C, the ball-shaped solder external terminal 6 may be detached from the electrode pattern 10 (hereinafter referred to as an open failure).
If necking failures and/or open failures occur during mounting process of the semiconductor device 1, the mounting reliability will be considerably decreased. Accordingly, in order to detect such failures, it is known to carry out an estimation of the configuration of the ball-shaped solder external terminals for a state after mounting the semiconductor device 1 onto the mounting board 3.
Conventionally, the evaluation of solder external terminals has been carried out by visual inspection or by X-ray photography after actually mounting the semiconductor device 1 onto the mounting board 3. Thus, with the solder shape evaluation method of the related art, the evaluation of the ball-shaped solder external terminals cannot be implemented before the mounting step. If any failure is produced, it is necessary to replace the solder balls 6 by solder balls of different size and then carrying out the mounting and estimation steps again until the size of the solder balls becomes appropriate.
Accordingly, the evaluation method of the related art has a drawback that it is time-consuming to carry out. Also, since the evaluation method is carried out by visual inspection or by X-ray photography, there is a further drawback of low evaluation accuracy.
Accordingly, it is a general object of the present invention to provide a method of evaluating the configuration of solder external terminals which can obviate the drawbacks described above.
It is another and more specific object of the present invention to provide a method of evaluating the configuration of solder external terminals which can be implemented before a mounting step with improved accuracy and with reduce time.
In order to achieve the above objects according to the present invention, a method is provided for evaluating configuration of solder external terminals of a BGA-type tape-based semiconductor device mounted on a mounting board such that the external terminals are joined to lands provided on the mounting board, the method including the steps of:
a) obtaining geometric data related to openings of a tape substrate of the semiconductor device, solder balls to be placed at positions corresponding to the openings, and the lands of the mounting board; and
b) deriving configuration of the solder external terminal based on the geometric data.
With the invention described above, since the estimation is based on known geometric data of the tape openings, solder balls and the lands, the configuration of the solder external terminals can be evaluated without actually mounting the solder balls on the mounting board. Accordingly, the solder balls can be evaluated accurately and with reduced time.
It is yet another object of the present invention to provide a method of evaluating the configuration of solder external terminals which may be applied to a case where voids are produced in the solder external terminals.
In order to achieve the above object, the method further includes the step of calculating the volume of voids to be produced in the external terminals. When deriving configuration of the solder external terminal based on the geometric data, the volume of voids is taken into account to compensate for the geometric data related to the tape substrate.
With the invention described above, the solder external terminals can be accurately evaluated even in a case were voids are produced in the solder external terminals.
The present invention also relates to an apparatus for implementing the method described above. The present invention further relates to a computer readable storage medium with program for implementing the method described above.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.